*/
#define XLAT_TABLE_NC (U(1) << 1)
+/*
+ * Offsets into a mmu_cfg_params array generated by setup_mmu_cfg(). All
+ * parameters are 64 bits wide.
+ */
+#define MMU_CFG_MAIR 0
+#define MMU_CFG_TCR 1
+#define MMU_CFG_TTBR0 2
+#define MMU_CFG_PARAM_MAX 3
+
#ifndef __ASSEMBLY__
#include <sys/types.h>
+/*
+ * Return the values that the MMU configuration registers must contain for the
+ * specified translation context. `params` must be a pointer to array of size
+ * MMU_CFG_PARAM_MAX.
+ */
+void setup_mmu_cfg(uint64_t *params, unsigned int flags,
+ const uint64_t *base_table, unsigned long long max_pa,
+ uintptr_t max_va, int xlat_regime);
+
#ifdef AARCH32
/* AArch32 specific translation table API */
void enable_mmu_secure(unsigned int flags);
#error "Do not include this header file directly. Include xlat_tables_v2.h instead."
#endif
-/* Offsets into mmu_cfg_params array. All parameters are 64 bits wide. */
-#define MMU_CFG_MAIR 0
-#define MMU_CFG_TCR 1
-#define MMU_CFG_TTBR0 2
-#define MMU_CFG_PARAM_MAX 3
-
#ifndef __ASSEMBLY__
#include <cassert.h>
#include <xlat_tables_arch.h>
#include <xlat_tables_defs.h>
-/* Parameters of register values required when enabling MMU */
-extern uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX];
-
/* Forward declaration */
struct mmap_region;
#error ARMv7 target does not support LPAE MMU descriptors
#endif
-uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX];
-
/*
* Returns 1 if the provided granule size is supported, 0 otherwise.
*/
* Function for enabling the MMU in Secure PL1, assuming that the page tables
* have already been created.
******************************************************************************/
-void setup_mmu_cfg(unsigned int flags, const uint64_t *base_table,
- unsigned long long max_pa, uintptr_t max_va,
- __unused int xlat_regime)
+void setup_mmu_cfg(uint64_t *params, unsigned int flags,
+ const uint64_t *base_table, unsigned long long max_pa,
+ uintptr_t max_va, __unused int xlat_regime)
{
uint64_t mair, ttbr0;
uint32_t ttbcr;
#endif
/* Now populate MMU configuration */
- mmu_cfg_params[MMU_CFG_MAIR] = mair;
- mmu_cfg_params[MMU_CFG_TCR] = (uint64_t) ttbcr;
- mmu_cfg_params[MMU_CFG_TTBR0] = ttbr0;
+ params[MMU_CFG_MAIR] = mair;
+ params[MMU_CFG_TCR] = (uint64_t) ttbcr;
+ params[MMU_CFG_TTBR0] = ttbr0;
}
#include <xlat_tables_v2.h>
#include "../xlat_tables_private.h"
-uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX];
-
/*
* Returns 1 if the provided granule size is supported, 0 otherwise.
*/
return el;
}
-void setup_mmu_cfg(unsigned int flags, const uint64_t *base_table,
- unsigned long long max_pa, uintptr_t max_va, int xlat_regime)
+void setup_mmu_cfg(uint64_t *params, unsigned int flags,
+ const uint64_t *base_table, unsigned long long max_pa,
+ uintptr_t max_va, int xlat_regime)
{
uint64_t mair, ttbr0, tcr;
uintptr_t virtual_addr_space_size;
ttbr0 |= TTBR_CNP_BIT;
#endif
- mmu_cfg_params[MMU_CFG_MAIR] = mair;
- mmu_cfg_params[MMU_CFG_TCR] = tcr;
- mmu_cfg_params[MMU_CFG_TTBR0] = ttbr0;
+ params[MMU_CFG_MAIR] = mair;
+ params[MMU_CFG_TCR] = tcr;
+ params[MMU_CFG_TTBR0] = ttbr0;
}
#include "xlat_tables_private.h"
+/*
+ * MMU configuration register values for the active translation context. Used
+ * from the MMU assembly helpers.
+ */
+uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX];
+
/*
* Each platform can define the size of its physical and virtual address spaces.
* If the platform hasn't defined one or both of them, default to
void enable_mmu_secure(unsigned int flags)
{
- setup_mmu_cfg(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
+ setup_mmu_cfg((uint64_t *)&mmu_cfg_params, flags,
+ tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
tf_xlat_ctx.va_max_address, EL1_EL0_REGIME);
enable_mmu_direct(flags);
}
void enable_mmu_el1(unsigned int flags)
{
- setup_mmu_cfg(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
+ setup_mmu_cfg((uint64_t *)&mmu_cfg_params, flags,
+ tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
tf_xlat_ctx.va_max_address, EL1_EL0_REGIME);
enable_mmu_direct_el1(flags);
}
void enable_mmu_el3(unsigned int flags)
{
- setup_mmu_cfg(flags, tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
+ setup_mmu_cfg((uint64_t *)&mmu_cfg_params, flags,
+ tf_xlat_ctx.base_table, MAX_PHYS_ADDR,
tf_xlat_ctx.va_max_address, EL3_REGIME);
enable_mmu_direct_el3(flags);
}
*/
unsigned long long xlat_arch_get_max_supported_pa(void);
-/* Enable MMU and configure it to use the specified translation tables. */
-void setup_mmu_cfg(unsigned int flags, const uint64_t *base_table,
- unsigned long long max_pa, uintptr_t max_va,
- int xlat_regime);
-
/*
* Return 1 if the MMU of the translation regime managed by the given xlat_ctx_t
* is enabled, 0 otherwise.